The present invention relates to the field of semiconductor technology. Specifically, embodiments of the invention are directed to three-dimensional (3D) contact structures in a semiconductor device.
In conventional fabrication methods, to form a contact to each word line in a three-dimensional (3D) memory requires repeated operations of patterning a mask layer, etching an insulating layer, and etching a conductive layer. In order to increase storage capacity, the number of layers keeps increasing in 3D memories. Therefore, the number of repeated operations is also increasing.
The inventors have observed that, with the increase in the number of layers, the process margin becomes smaller for conventional methods and process steps. In addition, since the mask layer is repeatedly patterned, the conventional method requires a thicker starting mask layer, which makes it difficult to achieve precise dimensional control, and it can be susceptible to accumulated errors. As a result, the error margin is reduced, and process time and cost is increased.